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 S3C8847/C8849/P8849
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM87 PRODUCT FAMILY
Samsung's SAM87 family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: -- Efficient register-oriented architecture -- Selectable CPU clock sources -- Release of Idle and Stop power-down modes by interrupt -- Built-in basic timer circuit with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum of six CPU clocks) can be assigned to specific interrupt levels.
S3C8847/C8849/P8849 MICROCONTROLLERS
The S3C8847 microcontroller has a 24-Kbyte on-chip program memory and the S3C8849 has a 32-Kbyte. Both chips have a 272-byte general-purpose internal register file. The interrupt structure has nine interrupt sources with nine interrupt vectors. The CPU recognizes seven interrupt priority levels. Using a modular design approach, the following peripherals were integrated with the SAM87 core to make the S3C8847/C8849/P8849 microcontrollers suitable for use in color television and other types of screen display applications: -- Four programmable I/O ports (26 pins total: 16 general-purpose I/O pins; 10 n-channel, open-drain output pins) -- 4-bit resolution A/D converter (4 channels) -- 14-bit PWM output (Two channels: push-pull type, open-drain type) -- Basic timer (BT) with watchdog timer function -- One 8-bit timer/counter (T0) with interval timer and PWM mode -- One 8-bit general-purpose timer/counter (TA) with prescalers -- On-screen display (OSD) with a wide range of programmable features, including halftone control signal output The S3C8847 and the S3C8849 are available in versatile 42-pin SDIP package.
OTP
The S3C8847/C8849 microcontrollers are also available in OTP (One Time Programmable) version, named the S3P8849. The S3P8849 microcontroller has an on-chip 32-Kbyte one-time-programmable EPROM instead of a masked ROM. The KS88P8432 is comparable to the S3C8847/C8849, both in function and pin configuration.
1-1
PRODUCT OVERVIEW
S3C8847/C8849/P8849
FEATURES
CPU * SAM87 CPU core Pulse Width Modulation Module * * * * 14-bit PWM with two-channel output (push-pull type, open-drain type) 8-bit PWM with four-channel, push-pull and opendrain PWM counter and data capture input pin Frequency: 5.859 kHz to 23.437 kHz with a 6 MHz CPU clock
Memory * * 24-Kbyte (S3C8847) or 32-Kbyte (S3C8849) internal program memory 272-byte general-purpose register area
Instruction Set * * 78 instructions IDLE and STOP instructions added for powerdown modes
On-Screen Display (OSD) * * * * * * * * * * Video RAM: 252 x 13-bits Character generator ROM: 384 x 18 x 16-bits (384 display characters; fixed; 2, variable; 382) 252 display positions (12 rows x 21 columns) 16-dot x 18-dot character resolution 16 different character sizes Eight character colors Vertical direction fade-in/fade-out control Eight colors for character and frame background Halftone control signal output; selectable for individual characters Synchronous polarity selector for H-sync and V-sync input
Instruction Execution Time * 750 ns (minimum) with an 8 MHz CPU clock
Interrupts * * * 9 interrupt sources with 9 vectors 7 interrupt levels Fast interrupt processing for select levels
General I/O * * * Four I/O ports (26 pins total) Six open-drain pins for up to 6 V loads Four open-drain pins for up to 5 V loads
8-Bit Basic Timer * * Three selectable internal clock frequencies Watchdog or oscillation stabilization function
Oscillator Frequency * * 5 MHz to 8 MHz external crystal oscillator Maximum 8 MHz CPU clock
Timer/Counters * One 8-bit timer/counter (T0) with three internal clocks or an external clock and interval timer mode or PWM mode. One general-purpose 8-bit timer/counters with interval timer mode (timer A)
Operating Temperature Range * - 20C to + 85C
Operating Voltage Range * 4.5 V to 5.5 V
*
Package Type * 42-pin SDIP
A/D Converter * * Four analog input pins; 4-bit resolution 3.125 s conversion time (8 MHz CPU clock)
1-2
S3C8847/C8849/P8849
PRODUCT OVERVIEW
BLOCK DIAGRAM
P0.0 - P0.7
P1.0 - P1.7
RESET INT0 - INT3
Port 0
Port 1 Test
XIN XOUT
Main Osc
SAM87 Bus Timer A Port I/O and Interrupt Control
OSC IN OSC OUT H-sync V-sync Vred Vgreen Vblue Vblank OSDHT
L-C Osc Timer 0
TO T0CK
OnScreen Display
SAM87 CPU
PWM Block PWM Counter and Data Capture 14-Bit PWM
CAPA
ADC0 ADC1 ADC2 ADC3
24/32-KByte 4-Bit ADC ROM
272-Byte Register File
PWM0 PWM1 PWM2 PWM3 PWM4 PWM5
SAM87 Bus 8-Bit PWM
Port 2
Port 3
P2.0 - P2.7
P3.0 - P3.1
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
S3C8847/C8849/P8849
PIN ASSIGNMENTS
P2.5/PWM0 P2.1/PWM1 P2.2/PWM2 P2.3/PWM3 P2.4/PWM4 P2.0/PWM5 P2.6/T0 P1.7/T0CK P3.0/ADC0 P3.1/ADC1 P0.6/ADC2 P0.7/ADC3 TEST P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4 P1.5 P1.6 P2.7/OSDHT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
S3C8847/C8849 42-SDIP
(Top View)
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
P0.0 P0.1 P0.2 P0.3 P0.4 VSS2 CAPA P0.5 VDD RESET XOUT XIN VSS1 OSCOUT OSCIN V-sync H-sync Vblank Vred Vgreen Vblue
Figure 1-2. S3C8847/C8849/P8849 Pin Assignment Diagram
1-4
S3C8847/C8849/P8849
PRODUCT OVERVIEW
PIN DESCRIPTIONS
Table 1-1. S3C8847/C8849/P8849 Pin Descriptions Pin Name P0.0-P0.3 Pin Type I/O Pin Description General I/O port (4-bit), configurable for digital input or n-channel open-drain, pushpull output. Pins can withstand up to 5 V loads. General I/O port (2-bit), configurable for digital input or push-pull output. General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P0.6-P0.7 can withstand up to 5 V loads. Multiplexed for alternative use as external inputs, ADC2-ADC3. I/O General I/O port (4-bit), configurable for digital input or n-channel open-drain output. P1.0-P1.3 can withstand up to 6 V loads. Multiplexed for alternative use as external interrupt inputs, INT0-INT3. General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P1.4-P1.5 can withstand up to 6 V loads. High current port(10mA) General I/O port (2-bit), configurable for digital input or push-pull output. Each pin has an alternative function. P1.7: T0CK (Timer 0 clock input) I/O General I/O port (8-bit). Input/output mode or n-channel open-drain, push-pull output mode are software configurable. Pins can withstand up to 5 V loads. Each pin has an alternative function. P2.0: PWM5 (8-bit PWM output) P2.1: PWM1 (14-bit PWM output) P2.2: PWM2 (8-bit PWM output) P2.3: PWM3 (8-bit PWM output) P2.4: PWM4 (8-bit PWM output) P2.5: PWM0 (14-bit PWM output) P2.6: T0 (Timer 0 PWM and interval output) P2.7: OSDHT (Halftone signal output) General I/O port (2-bit), configurable for digital input or n-channel open-drain output. P3.0-P3.1 can withstand up to 5 V loads. Multiplexed for alternative use as external inputs ADC0-ADC1. Circuit Type 2 Pin Numbers 39-42 Share Pins (see pin description)
P0.4-P0.5 P0.6-P0.7
3 6
38, 35 11-12 ADC2-ADC3
P1.0-P1.3
7
14-17
INT0-INT3
P1.4-P1.5
5
18-19
P1.6-P1.7
3
20, 8
T0CK
P2.0-P2.7
2
1-7, 21
PWM0- PWM5 T0, OSDHT
P3.0-P3.1
I/O
6
9-10
ADC0-ADC1
1-5
PRODUCT OVERVIEW
S3C8847/C8849/P8849
Table 1-1. S3C8847/C8849/P8849 Pin Descriptions (Continued) Pin Name PWM0- PWM1 PWM2- PWM5 ADC0-ADC3 INT0-INT3 T0 T0CK OSDHT Vblue, Vgreen Vred, Vblank H-sync, V-sync OSCIN, OSCOUT XIN, XOUT RESET TEST Pin Type O O I I O I O O I I, O I, O I - Pin Description Output pin for 14-bit PWM circuit Output pin for 8-bit PWM circuit Analog inputs for 4-bit A/D converter External interrupt input pins Timer 0 output (interval, PWM) Timer 0 clock input Halftone control signal output for OSD Digital blue, green, red, and video blank signal outputs for OSD H-sync, V-sync input for OSD L-C oscillator pins for OSD clock frequency generation System clock pins System reset input pin Test Pin (must be connected to VSS). Factory test mode is activated when 12V is applied. Power supply pins Input for capture A module Circuit Type 2 2 6 7 2 3 2 4 1 - - 8 - Pin Numbers 1, 2 3-6 9-12 14-17 7 8 21 22-25 26, 27 28, 29 31, 32 33 13 Share Pins P2.5, P2.1 P2.2-P2.4, P2.0 P3.0-P3.1, P0.6-P0.7 P1.0-P1.3 P2.6 P1.7 P2.7 - - - - - -
VDD, VSS1, VSS2 CAPA
- I
- 1
34, 30, 37 36
- -
1-6
S3C8847/C8849/P8849
PRODUCT OVERVIEW
PIN CIRCUITS
Input
Noise Filter
Figure 1-3. Pin Circuit Type 1 (V-Sync H-Sync, CAPA)
VDD Data I/O Open-drain Output Disable VSS Input
Figure 1-4. Pin Circuit Type 2 (P2.0-P2.7, P0.0-P0.3, PWM0-PWM5, T0, OSDHT)
1-7
PRODUCT OVERVIEW
S3C8847/C8849/P8849
VDD
Data
I/ O
VSS Input
Figure 1-5. Pin Circuit Type 3 (P0.4-P0.5, P1.6-P1.7, T0CK)
VDD
Data
Output
VSS
Figure 1-6. Pin Circuit Type 4 (Vblue, Vgreen, Vred, Vblank)
1-8
S3C8847/C8849/P8849
PRODUCT OVERVIEW
I/O Data
VSS Input
NOTE: Circuit type 5 can withstand up to 6 V loads.
Figure 1-7. Pin Circuit Type 5 (P1.4-P1.5)
I/O Data
VSS Input A/D In
NOTE: Circuit type 6 can withstand up to 5 V loads.
Figure 1-8. Pin Circuit Type 6 (P3.0-P3.1, P0.6-P0.7, ADC0-ADC3)
1-9
PRODUCT OVERVIEW
S3C8847/C8849/P8849
I/O Data VSS Input INT Noise Filter
NOTE: Circuit type 7 can withstand up to 6 V loads.
Figure 1-9. Pin Circuit Type 7 (P1.0-P1.3, INT0-INT3)
200 K
Input
Noise Filter
Figure 1-10. Pin Circuit Type 8 (RESET RESET)
1-10
S3C8847/C8849/P8849
ELECTRICAL DATA
15
OVERVIEW
-- I/O capacitance
ELECTRICAL DATA
In this section, the S3C8847 and the S3C8849 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: -- Absolute maximum ratings -- D.C. electrical characteristics -- A.C. electrical characteristics -- Input timing measurement points for tNF1 and tNF2 -- Data retention supply voltage in Stop mode -- Stop mode release timing when initiated by RESET -- Main oscillator and L-C oscillator frequency -- Clock timing measurement points for XIN -- Main oscillator clock stabilization time (tST) -- A/D converter electrical characteristics -- Characteristic curves
15-1
ELECTRICAL DATA
S3C8847/C8849/P8849
Table 15-1. Absolute Maximum Ratings (TA = 25 C) Parameter Supply Voltage Input Voltage Symbol VDD VI1 VI2 Output Voltage Output Current High Output Current Low VO I OH Conditions - P1.0-P1.5 (open-drain) All port pins except VI1 All output pins One I/O pin active All I/O pins active I OL One I/O pin active Total pin current for port 1 Total pin current for ports 0, 2, and 3 Operating Temperature Storage Temperature TA TSTG - - Rating - 0.3 to + 6.0 - 0.3 to + 7 - 0.3 to VDD + 0.3 - 0.3 to VDD + 0.3 - 18 - 60 + 30 + 100 + 100 - 20 to + 85 - 65 to + 150
C C
Unit V V
V mA
mA
Table 15-2. D.C. Electrical Characteristics (TA = - 20 C to + 85 C, VDD = 4.5 V to 5.5 V) Parameter Input High Voltage Input Low Voltage Symbol VIH1 VIH2 VIL1 VIL2 Output High Voltage Output Low Voltage VOH Conditions All input pins except VIH2
XIN, XOUT
Min 0.8 VDD 2.7 V -
Typ -
Max VDD
Unit V
All input pins except VIL2 XIN, XOUT IOH = - 500 A P0.0-P0.5, P1.6-P1.7, P2 R, G, B, Vblank IOL = 4 mA P0.0-P0.5, P1.6-P1.7 IOL = 10 mA P1.4-P1.5 IOL = 2 mA P1.0-P1.3, P3.0-P3.1, P0.6-P0.7 IOL = 1 mA R, G, B, Vblank, P2
-
0.2 VDD 1.0 V -
V
VDD - 0.8
-
V
VOL1 VOL2 VOL3
- - -
- - -
0.4 0.8 0.4
V
VOL4
-
-
0.4
V
15-2
S3C8847/C8849/P8849
ELECTRICAL DATA
Table 15-2. D.C. Electrical Characteristics (Continued) (TA = - 20 C to + 85 C, VDD = 4.5 V to 5.5 V) Parameter Input High Leakage Current Symbol ILIH1 Conditions VIN = VDD All input pins except ILIH2 and ILIH3 VIN = VDD, OSCIN, OSCOUT VIN = VDD, XIN, XOUT VIN = 0 V All input pins except ILIL2, ILIL3, and RESET ILIL2 ILIL3 Output High Leakage Current ILOH1 ILOH2 Output Low Leakage Current Supply Current
(note)
Min -
Typ -
Max 3
Unit A
ILIH2 ILIH3 Input Low Leakage Current ILIL1
10 2.5 - 10 - 20 -3 A
VIN = 0 V, OSCIN, OSCOUT VIN = 0 V, XIN, XOUT VOUT = VDD All output pins except ILOH2 VOUT = 6 V P1.0-P1.5 VOUT = 0 V All output pins Normal mode; VDD = 4.5 V to 5.5 V 8-MHz CPU clock Idle mode; VDD = 4.5 V to 5.5 V 8-MHz CPU clock Stop mode; VDD = 4.5 V to 5.5 V - - - 7 - 2.5 - - 10 -
- 10 - 20 3 10 -3 20 A mA A
ILOL IDD1
IDD2
2
10
IDD3
1
10
A
NOTE: Supply current does not include the current drawn through internal pull-up resistors or external output current loads.
15-3
ELECTRICAL DATA
S3C8847/C8849/P8849
Table 15-3. Input/output Capacitance (TA = - 20 C to + 85 C, VDD = 0 V) Parameter Input capacitance Output capacitance I/O capacitance Symbol CIN COUT CIO Conditions f = 1 MHz; unmeasured pins are connected to VSS Min - Typ - Max 10 Unit pF
Table 15-4. A.C. Electrical Characteristics (TA = - 20 C to + 85 C, VDD = 4.5 V to 5.5 V) Parameter V-sync Pulse Width H-sync Pulse Width Noise Filter Symbol tVW tHW tNF1 tNF2 tNF3 tNF4
NOTE: fCAPA = fOSC/128
Conditions - - P1.0-P1.3 RESET, H-sync, V-sync Glitch filter (oscillator block) CAPA
Min 4 3 - - - -
Typ - - 350 1000 25 5
Max - - -
Unit s s ns
-
tCAPA
1tCPU tNF1L tNF2 tNF1H
0.8 VDD 0.2 VDD
Figure 15-1. Input Timing Measurement Points for tNF1 and tNF2
15-4
S3C8847/C8849/P8849
ELECTRICAL DATA
Table 15-5. Data Retention Supply Voltage in Stop Mode (TA = - 20 C to + 85 C) Parameter Data Retention Supply Voltage Data Retention Supply Current Symbol VDDDR IDDDR Conditions Stop mode Stop mode, VDDDR = 2.0 V Min 2 - Typ - - Max 6 5 Unit V A
NOTES: 1. Supply current does not include the current drawn through internal pull-up resistors or external output current loads. 2. During the oscillator stabilization wait time (tWAIT), all the CPU operations must be stopped.
t SREL STOP MODE DATA RETENTION MODE
OSCILLATION STABILIZATION TIME NORMAL OPERATING MODE
VDD
~ ~
~ ~
VDDDR
RESET EXECUTION OF STOP INSTRUCTION
NOTE: t WAIT is the same as 4096 x 16 x 1 / f OSC
t WAIT
Figure 15-2. Stop Mode Release Timing When Initiated by a RESET
15-5
ELECTRICAL DATA
S3C8847/C8849/P8849
Table 15-6. Main Oscillator and L-C Oscillator Frequency (TA = - 20 C + 85 C, VDD = 4.5 V to 5.5 V) Oscillator Crystal Clock Circuit
C1
Conditions OSD block active
Min 5
Typ 6
Max 8
Unit MHz
XIN XOUT
C2
OSD block inactive Ceramic
C1
0.5 5
6 6
8 8 MHz
OSD block active
XIN XOUT
C2
OSD block inactive External Clock
XIN XOUT
0.5 5
6 6
8 8 MHz
OSD block active
OSD block inactive L-C Oscillator
C1
0.5 5
6 6.5
8 8 MHz
OSCIN OSCOUT
C2
Recommend value; C1 = C2 = 20 pF
CPU Clock Frequency
-
0.032
6.0
8
MHz
1 / fOSC
tXL
tXH
XIN
2.7 V 1.0 V
Figure 15-3. Clock Timing Measurement Points for XIN
15-6
S3C8847/C8849/P8849
ELECTRICAL DATA
Table 15-7. Main Oscillator Clock Stabilization Time (TA = - 20 C + 85 C, VDD = 4.5 V to 5.5 V) Oscillator Crystal Ceramic Symbol - Test Condition VDD = 4.5 V to 6.0 V (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) XIN input High and Low level width (tXH, tXL) tSREL tWAIT Normal operation CPU clock = 8 MHz; Stop mode released by RESET CPU clock = 8 MHz; Stop mode released by an interrupt 65 - - - 1000 8.3 Min - Typ - Max 20 10 Unit ms
External Clock Release Signal Setup Time Oscillation Stabilization Wait Time (1)
100 - -
ns ns ms
(2)
NOTES: 1. Oscillation stabilization time is the time required for the CPU clock to return to its normal oscillation frequency after a power-on occurs, or when Stop mode is released. 2. The oscillation stabilization interval is determined by the basic timer (BT) input clock setting.
Table 15-8. A/D Converter Electrical Characteristics (TA = - 20 C to + 85 C, VDD = 4.5 V to 5.5 V, VSS = 0 V) Parameter Absolute Accuracy
(1)
Symbol - tCON VIAN RAN
Conditions CPU clock = 8 MHz
Min - tCPU x 25
(3)
Typ - - -
Max 0.5
Unit LSB s
Conversion Time (2) Analog Input Voltage Analog Input Impedance
- -
VSS 2
VDD -
V M
NOTES: 1. Excluding quantization error, absolute accuracy values are within 1/2 LSB. 2. 'Conversion time' is the time required from the moment a conversion operation starts until it ends. 3. The unit tCPU means one CPU clock period.
15-7
S3C8847/C8849/P8849
MECHANICAL DATA
16
OVERVIEW
42 14.00 0.2
MECHANICAL DATA
The S3C8847 and the S3C8849 microcontrollers are available in 42-pin SIP package (42-SDIP-600).
22
0 ~ 15
42-SDIP-600
#1
21
0.25 +0.1 - 0.0 5
3.50 0.2
(1.77)
0.50 0.1
1.00 0.1
1.778
NOTE: Package dimensions are in millimeters.
Figure 16-1. 42-Pin SDIP Package Mechanical Data (42-SDIP-600)
3.30 0.3
0.51MIN
5.08MAX
39.10 0.2
15.24
16-1
S3C8847/C8849/P8849
S3P8849 OTP
17
OVERVIEW
S3P8849 OTP
The S3P8849 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C8847/C8849microcontroller. It has an on-chip OTP ROM instead of a masked ROM. The EPROM is accessed by serial data format. The S3P8849 is fully compatible with the S3C8847/C8849, both in function and pin configuration. The simple programming requirements of the S3P8849 make the device ideal for use as an evaluation chip for the S3C8847/C8849.
P2.5/PWM0 P2.1/PWM1 SCLK/P2.2/PWM2 SDAT/P2.3/PWM3 P2.4/PWM4 P2.0/PWM5 P2.6/T0 P1.7/T0CK P3.0/ADC0 P3.1/ADC1 P0.6/ADC2 P0.7/ADC3 TEST/TEST P1.0/INT0 P1.1/INT1 P1.2/INT2 P1.3/INT3 P1.4 P1.5 P1.6 P2.7/OSDHT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
S3P8849 42-SDIP
(Top View)
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
P0.0 P0.1 P0.2 P0.3 P0.4 VSS2/VSS2 CAPA P0.5 VDD/VDD RESET/RESET RESET XOUT XIN VSS1/VSS1 OSCOUT OSCIN V-sync H-sync Vblank Vred Vgreen Vblue
Figure 17-1. S3P8849 Pin Assignment (42-SDIP)
17-1
S3P8849 OTP
S3C8847/C8849/P8849
Table 17-1. Descriptions of Pins Used to Read/Write the EPROM (S3P8849) Main Chip Pin Name P2.3 (Pin 4) Pin Name SDAT Pin No. 4 During Programming I/O I/O Function Serial data pin (output when reading, Input when writing) Input and push-pull output port can be assigned Serial clock pin (Input only pin) 0 V: operating mode 5 V: test mode 12.5 V: OTP mode 5 V: operating mode, 0 V: OTP mode Logic power supply pin.
P2.2 (Pin 3) TEST
SCLK VPP (TEST)
3 13
I/O I
RESET VDD/VSS
RESET VDD/VSS
33 34/30, 37
I I
Table 17-2. Comparison of S3P8849 and S3C8847/C8849Features Characteristic Program Memory Operating Voltage (VDD) OTP Programming Mode Pin Configuration EPROM Programmability 4.5 V to 5.5 V VDD = 5 V, TEST VPP = 12.5 V 42 SDIP User Program 1 time 42 SDIP Programmed at the factory S3P8849 32-K byte EPROM S3C8847/C8849 24/32-K byte mask ROM 4.5 V to 5.5 V -
OPERATING MODE CHARACTERISTICS When 12.5 V is supplied to the VPP (TEST) pin of the S3P8849, the EPROM programming mode is entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table 16-3 below. Table 17-3. Operating Mode Selection Criteria VDD 5V VPP (TEST) 5V 12.5 V 12.5 V 12.5 V REG/ MEM 0 0 0 1 ADDRESS (A15-A0) 0000H 0000H 0000H 0E3FH R/W 1 0 1 0 EPROM read EPROM program EPROM verify EPROM read protection MODE
NOTE: "0" means Low level; "1" means High level.
17-2


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